Introduction

The grid gives you a sine. It swings from $+325\ \mathrm{V}$ to $-325\ \mathrm{V}$ and back, fifty times a second, and averages to zero. A battery wants the opposite: a steady voltage of one fixed polarity. So here is the question this course answers: how do you convert AC into DC? That conversion is called rectification, and the machine that does it is a rectifier.

Figure 1 The job of this course, in one picture: the grid's AC sine goes in on the left, the rectifier turns it into DC in the middle, and that DC charges the battery on the right.

One way to do it is a diode bridge. Four diodes, arranged so that whichever way the grid is leaning, the current is steered out of the same terminal. The effect is easy to state: the bridge takes the absolute value of the grid voltage. The negative half of the sine is folded up to become positive, and what comes out never reverses. That is DC, in the sense that it has one polarity.

It is not, however, a controlled DC. The output is whatever the grid happens to be doing at that instant, folded; you cannot dial it to the voltage your battery wants. Fixing that is what the rest of this course is about.

Every course so far in this series has moved DC around: the buck stepped a DC voltage down, the boost stepped it up. This one starts somewhere new, with the AC grid on the input side: the 230-volt, 50-hertz sine that comes out of the wall.

It is beneficial to have read the boost guide first, but it is not necessary. We do assume a basic understanding of how a boost converter works — in particular its duty-cycle relation,

$$V_{out} = \frac{V_{in}}{1-D}$$

because the active rectifier in Chapter 4 is a boost converter, and that one formula is where its whole behaviour comes from.

Who this is for

This guide is for anyone who wants to understand how a grid-connected charger turns AC into DC, and why the simplest way to do it is not the way it is actually done in industry. You need a little comfort with basic maths and some basic electronics (what voltage and current are, and roughly what a diode, capacitor, and inductor do). That is it. No prior course in this series is required, and every formula is followed by a plain sentence saying what it means.

A few recurring boxes will help you navigate:

Plot figures carry an Open in simulator link. It drops you into the companion web simulator at the matching operating point, where you can change the circuit and re-run it yourself. Use it: seeing a waveform move when you change a component is worth more than reading about it.

The plan

• Chapter 2: why you need a rectifier, and the simplest one there is: four diodes in a bridge, with a capacitor to smooth the output.
• Chapter 3: the trouble with that simple rectifier. It pulls an ugly, spiky current from the grid. We meet harmonics, THD, and power factor, and see why the grid operator does not want this on their network.
• Chapter 4: the fix: the active rectifier, or power-factor-corrected (PFC) rectifier. It is the diode bridge with a boost converter bolted on behind it, controlled so the grid current comes out as a clean sine.
• Chapter 5: how that boost is controlled: two loops, one holding the DC voltage steady, one shaping the current.
• Chapter 6: the version industry actually builds: the totem-pole PFC, which is the same idea with fewer parts.

Everything here is single phase: one live, one neutral, the supply a domestic charger or a small charging station sees. Three-phase rectifiers are a later course.

The running example, and notation

Throughout, we use one running example, with fixed numbers, so nothing stays abstract: a 1 kW charger taking 230 V from the wall and charging a battery through a 400 V DC bus. Every parameter it fixes is in the table below, and the same numbers come back in the duty-cycle plots, the control-loop figures and the worked examples.

From AC to DC: the passive rectifier

What a rectifier is

A rectifier converts AC voltage into DC voltage. That is all a rectifier is.

Figure 2 A rectifier in one picture: the grid's two-way sine goes in on the left, a steady one-way DC voltage comes out on the right, and the box in between (the rectifier) is the thing that makes the conversion happen.

One way to do this is a passive rectifier. A passive rectifier is basically a diode bridge: no transistors, no control, nothing to program, just four diodes arranged in a bridge.

Why we need one

A battery wants DC: a steady voltage of one fixed polarity, plus a controlled current to charge it. The grid offers the opposite: a sine wave that swings from $+325\ \mathrm{V}$ to $-325\ \mathrm{V}$ and back, fifty times a second, averaging to zero. Connect a battery straight to that and it would be charged for half of each cycle and discharged for the other half, net nothing, and the reversing voltage would wreck it.

So the very first thing any grid-connected charger must do is rectify: force that two-way sine into a one-way DC voltage. Everything else in the course is about doing it well; this chapter is about doing it at all.

Four diodes in a bridge

Here is the bridge: four diodes, the grid on the left, the DC output driving the load on the right.

Figure 3 The single-phase full-bridge rectifier: four diodes, the grid on the left, the DC output driving the load on the right.

First, how a single diode works. A diode is a one-way valve for current. It conducts only when it is forward-biased: when the voltage across it is positive, meaning its input side is pushed higher than its output side. Push it the other way (input side lower than output side) and it blocks: no current at all. That single rule is everything we need to read the bridge.

Now watch the four diodes steer the grid automatically. Take the positive half-cycle, when the grid's top terminal is higher than its bottom terminal. The grid forces a current out of its top terminal, and that current has to go somewhere. The only forward-biased path is up through the conducting diode ($D_1$): its input side is being pushed higher than its output side, so it conducts. The current is forced up through it because it has no other way to go, since it cannot go down through the reverse diode (that would be the blocking direction). So the current runs out the top, through $D_1$, down through the load, and back out to the grid through $D_4$, while $D_2$ and $D_3$ are reverse-biased and carry nothing.

The green wires and diodes below carry the current; the crossed-out diodes are the ones blocking.

Figure 4 Positive half-cycle: the grid's top terminal is positive, so $D_1$ and $D_4$ conduct (green) while $D_2$ and $D_3$ block (crossed out). Current flows out of the top of the bridge, down through the load, and back.

• On the positive half-cycle, the grid pushes current out the top, through $D_1$, down through the load, and back through $D_4$. The other two diodes, $D_2$ and $D_3$, are pushed backwards and block: they carry nothing.
• On the negative half-cycle the grid reverses. Now $D_1$ and $D_4$ block and $D_2$, $D_3$ take over, but notice they route the current through the load the same way as before.

Figure 5 Negative half-cycle: the grid has reversed, so now $D_2$ and $D_3$ conduct and $D_1$, $D_4$ block. The grid current through the bridge has reversed, but the current through the load still flows the same way, top to bottom.

So whichever way the grid swings, the current always leaves by the same DC terminal. The output never reverses. What was a two-way sine becomes a one-way stream of humps: the absolute value of the sine, $|v_g|$. Look at the figure below: the top trace is the grid voltage going in (a sine), and the lower trace is what comes out of the bridge (the same sine with every negative half flipped up).

Figure 6 Top: the grid voltage, a sine swinging $\pm 325\ \mathrm{V}$. Bottom: after the bridge, every negative half has been flipped up. The output is always positive, but it is far from steady: it drops to zero twice per cycle.

In the lower trace the humps touch zero twice per cycle, once at each grid zero crossing, and that is the signal we now have to flatten.

Smoothing it: the output capacitor

This is not flat DC yet: it is a train of humps that drops to zero twice a cycle, and a battery (or the DC bus of any electronics) wants a voltage that barely moves. So we add a capacitor to smooth it: hang a big capacitor across the output and it straightens the humps into a near-steady voltage. Let us see how.

Figure 7 The full bridge with a large output capacitor $C$ across the DC rails, in parallel with the load $R_{load}$. The node-voltage labels are what we will reason about: the rectified grid voltage on the bridge side of the diodes, and the capacitor (load) voltage on the output side.

A capacitor resists changes in voltage: think of it as a small reservoir of charge. Each time a hump rises to its peak, it tops the capacitor up to about $325\ \mathrm{V}$. Then, as the hump falls away, the capacitor alone holds the load up, slowly draining until the next peak arrives to refill it.

Why do the diodes stop conducting while the capacitor drains? Reason about it on the circuit. While the capacitor holds the load above the rectified grid voltage, the output side of each diode (the load side) is higher than its input side (the grid side). That is the blocking direction: the diodes are reverse-biased, so no current flows through them. The grid is disconnected, and the capacitor supplies the load on its own. Only when the rising hump climbs back above the capacitor voltage does a diode become forward-biased again, and the grid takes over to refill the capacitor.

The result is a DC voltage that sits near the peak (around $325\ \mathrm{V}$), sagging a little between peaks and getting topped back up at each one. That sag is called the ripple.

Using the capacitor equation

To explain how much it sags, and why the current comes back as spikes, we only need one equation, the defining relation of a capacitor:

The current into a capacitor is its capacitance times how fast its voltage changes. Read it both ways and it explains both halves of the picture.

So the droop and the spikes are two readings of the same equation. Between peaks, $dV/dt = -I_{load}/C$ sets how fast the voltage falls. At each peak, the refill happens in a tiny $dt$, so the current $i = C\,dV/dt$ is forced into a tall spike.

Figure 8 Top: the smoothed DC bus (bold) charges to $\approx 325\ \mathrm{V}$ at each peak of the full-wave $|\sin|$, then droops before the next peak refills it. Bottom: the price of that smoothing: the grid current $i_g$ now flows only in short, tall spikes near each peak, alternating in sign with the grid. It is nothing like a sine.

And there is the catch, sitting in the bottom panel. Look at when the grid current flows. The diodes only conduct in the brief window where the rising hump is higher than the drooping capacitor: a short slice near each peak. For the rest of the cycle the capacitor carries the load by itself and the grid current is zero. So the grid is not asked for a smooth sine of current; it is asked for a series of brief, violent gulps.

The capacitor-size tradeoff

Now use the same equation to size the capacitor, and you find a tradeoff with no free side. A bigger capacitor gives a smoother voltage: slower droop, less ripple, closer to DC ($dV/dt = -I_{load}/C$). But a bigger capacitor holds the voltage up longer, so the rising grid takes longer to catch back up, and when it finally does it must replace more charge in a shorter window: a taller, narrower current spike. Smoother voltage, nastier current: the two sides of the same coin.

Figure 9 Two capacitor sizes compared, overlaid. The larger $C$ (blue) gives a flatter DC voltage with less ripple, but its grid-current spikes are taller and narrower than the smaller $C$'s (orange). The current alternates sign with the grid, same as the full-bridge current on the earlier figure. Bigger $C$ buys a smoother voltage at the cost of a worse current.

Try it yourself. Start with a small capacitor and watch the bare humps, then make it bigger and watch two things happen at once: the DC voltage smooths out, and the grid current collapses into taller, narrower spikes. That trade is the whole story of the next chapter.

The trouble with the passive rectifier

The passive bridge works: it makes DC. But the spiky current it pulls is a genuine problem. Here is the plain reason it is bad.

Why the spikes are bad for the grid

Ideally, the current a charger draws from the grid should be a clean sine, because that disturbs the grid the least. A sine is a smooth, gentle demand: it asks for a little more current, then a little less, never suddenly.

The capacitor-input bridge does the opposite. It pulls its energy in sudden, narrow spikes: a violent, fast demand on the grid. Asking for that much current that quickly, twice a cycle, is not good for the grid, and not good for the other components sharing it. Those harmonic currents are real currents, and they flow through every wire, transformer and connection between the charger and the power station, doing no useful work, but causing harm along the way:

• They heat the wiring and transformers. Heating depends on the total RMS current, spikes included, so a spiky load wastes capacity and shortens equipment life for no benefit.
• They distort the grid voltage itself. The spiky currents, pushed through the grid's own impedance, bend the voltage sine out of shape, so one bad load degrades the supply for everyone nearby.
• They can excite resonances, unwanted ringing stirred up in nearby wiring or filter components, and add extra stress to a building's shared neutral conductor.

So the concrete problem is simple: pushing short bursts of current is bad for the grid (and probably for everything else connected to it), and a smooth sine would be far gentler. The rest of this chapter puts technical language on exactly how non-sinusoidal the spiky current is, and what that costs. We need three ideas the power industry cares about a great deal: harmonics, total harmonic distortion, and power factor.

Figure 10 One spiky load, everyone's supply pays for it. The charger draws current in sharp pulses; those pulses cross the impedance the street shares, and the voltage the neighbours receive is bent out of shape. The effect is exaggerated here for clarity.

A spiky current is many sine waves at once

Here is a fact that does a lot of work, and you have probably met it before. Any repeating waveform, however strange its shape, can be built by adding together pure sine waves: one at the original frequency (the fundamental, here $50\ \mathrm{Hz}$), and others at whole-number multiples of it (the harmonics: $150\ \mathrm{Hz}$, $250\ \mathrm{Hz}$, $350\ \mathrm{Hz}$, and so on). This is the Fourier series: it tells you which frequencies are present in a signal and how dominant each one is. A clean sine is only the fundamental. The more a waveform departs from a sine, the more harmonics you need to build it, and the more its energy sits in the higher harmonics.

Our spiky grid current is about as far from a sine as it gets, so it is rich in harmonics: it is dominated by the higher-frequency components rather than the fundamental.

Figure 11 The spiky current of a capacitor-input diode bridge, broken into its sine ingredients. The fundamental ($50\ \mathrm{Hz}$) is the useful part; the tall stack of odd harmonics on top of it is pure pollution. Together they add up to a total harmonic distortion (THD) of over 100%.

(Only odd harmonics appear: the 3rd, 5th, 7th and so on. That is because the current is symmetric: the negative-half spike is a mirror image of the positive-half spike, and that symmetry cancels every even harmonic. The alternating shape you saw in the last figure is exactly what produces an odd-harmonic spectrum.)

Add the harmonics back one at a time in the figure below and watch the smooth fundamental gradually sharpen into the spike. The more of them you keep, the closer the reconstruction gets, which is another way of saying how much of this current is not the useful $50\ \mathrm{Hz}$ part.

The ideal grid current is therefore a pure sine at the grid frequency, in step with the voltage: only a fundamental ($50\ \mathrm{Hz}$), no harmonics. That is what the grid wants. Then every amp drawn does useful work, and the load looks, from the grid's side, like a simple resistor. Holding the current sinusoidal is half of what the next chapter's circuit is built to do.

Putting a number on it: THD

Now put a single number on how much of that pollution is present, so we can say precisely how non-sinusoidal, how disturbing, a current is. That is the total harmonic distortion, or THD. The more energy sitting in the harmonics relative to the fundamental, the higher the THD.

Active power, reactive power, and power factor

Figure 12 Active power flows one way and does work. Reactive power sloshes back and forth between the source and the components that store it, and over a whole cycle does no net work at all.

There is a second, related way the passive bridge misbehaves, and it brings in the language of active and reactive power, worth meeting properly, because it runs through the whole of grid engineering.

When a load draws a sinusoidal current that is perfectly in step with the voltage, every watt the grid delivers does work: this is active power $P$, measured in watts, the part that actually charges the battery. If instead the current is shifted in time relative to the voltage (it leads or lags), then during part of each cycle the load is handing power back to the grid. That sloshing, back-and-forth power does no net work but still loads the wires; it is reactive power $Q$, measured in volt-amps reactive (var).

The grid has to supply both. Their combination is the apparent power $S$ (in volt-amps), and the fraction that is actually useful is the power factor:

A power factor of $1$ is perfect: all the supplied power does work. A poor power factor means the grid must push extra current (and size its cables and transformers for it) to deliver a given number of useful watts.

Figure 13 The same battery being charged, drawing the same active power, two ways. The ideal (green) is a clean sine in step with the voltage: power factor near $1$, no harmonics. The diode bridge (orange) gulps the same energy in spikes: a power factor of $0.6$ to $0.7$ and a current full of harmonics.

The active rectifier: a boost PFC

We want the best of both worlds: a steady DC voltage on the output and a clean, sinusoidal current drawn from the grid. A pile of diodes and a capacitor cannot do it: they have nothing to control. We need an active switch and a controller. The standard answer is to take the diode bridge and put a boost converter right behind it. Used this way, the boost is called a power-factor correction stage, or PFC.

Figure 14 The boost PFC: the same diode bridge as before, but now its humpy output feeds a boost stage ($L$, switch $Q$, diode $D$, capacitor $C$). The boost both regulates the DC output and shapes the grid current into a sine.

What the boost is asked to do here

This is the same boost converter from the boost guide: the same inductor, switch, diode and capacitor, the same step-up action, re-derived from scratch in the average model below so nothing here depends on having seen it before. But it is being asked to do something new, and two differences are worth pinning down.

First: the input voltage is no longer constant. In the boost guide, the input was a steady source (a solar panel, a battery). Here the boost's input is the rectified grid: the train of humps, $|v_g|$, swinging from $0$ all the way up to $325\ \mathrm{V}$ and back, a hundred times a second. The boost has to cope with an input that is constantly moving.

Second: we now care about the input current, not just the output voltage. A normal boost only cares that its output is right; whatever current it draws from its source is incidental. A PFC has the opposite priority bolted on top: its input current must be a clean sine in step with the grid. That is the whole reason it exists.

Here are the two signals that matter most, right up front so you have something to look at: the voltage going into the boost, and the current going into the boost.

Figure 15 Top: the boost's input voltage, the rectified grid $|v_g|$, swinging from $0$ to $325\ \mathrm{V}$ and back twice a cycle. Bottom: the input current the controller forces: a clean rectified sine, in step with the voltage. This is exactly the smooth, in-phase current the grid wants, and the whole job of the PFC is to make the bottom trace look like this.

The bottom trace is the prize. Where the passive bridge gulped current in spikes, the boost PFC draws a smooth sinusoidal current that follows the voltage. Seen from the grid, the charger now looks like a simple resistor: THD down to a few per cent, power factor up near $1$. The rest of the chapter is how it manages it.

How a varying input makes the duty cycle move

Recall the boost's voltage rule: with a steady input, the output sat at $V_{out} = V_{in}/(1-D)$, so a fixed input and output meant a fixed duty cycle $D$.

Now feed it the moving rectified input. To hold the output fixed at, say, $400\ \mathrm{V}$ while the input $|v_g|$ swings, the duty cycle can no longer sit still: it must move with the input, instant by instant. Rearranging the boost rule for the duty that holds $V_{dc}$ steady:

When the input is near a zero crossing ($|v_g|$ small), the boost has to step up enormously, so the duty is high, near $1$. At the peak ($|v_g|\approx 325\ \mathrm{V}$, just below the $400\ \mathrm{V}$ output), it barely has to step up at all, so the duty drops to its minimum, $1 - 325/400 \approx 0.19$. Over each half-cycle the duty sweeps from near $1$ down to about $0.19$ and back. For our running example, a $1\ \mathrm{kW}$ charger with this $325\ \mathrm{V}$ peak, that is a grid current peaking at about $6\ \mathrm{A}$ ($P \approx \hat V_g I_{pk}/2$), which is the number we will carry into the control chapter.

Figure 16 The duty cycle over one grid cycle, doing the work: $d(t) = 1 - |v_g(t)|/V_{dc}$ sweeps from near $1$ at each zero crossing (where the boost must step up enormously) down to $\approx 0.19$ at each peak (where it barely steps up at all).

Pull the bus target below the $325\ \mathrm{V}$ peak in the figure below and watch the duty hit its floor around each peak: the boost cannot step down, so it loses control exactly there and the current distorts. That is why the bus has to sit at $400\ \mathrm{V}$.

The average model: what the controller is designed against

The next chapter builds a controller for this boost, and every equation in it (the feed-forward duty, the plant it is designed against) comes from one short piece of reasoning here.

The boost switches on and off tens of thousands of times a second (a few hundred times within each single $20\ \mathrm{ms}$ grid cycle, at our $20\ \mathrm{kHz}$ switching frequency). We do not want to track every switching event to design a controller; we want a smooth model of the average behaviour. The trick is to replace the switch by its duty cycle: instead of a device that is fully on or fully off, treat it as if it applies the fraction $d$ of the time, on average, over each switching period.

Do that, and the inductor sees, on average, the input voltage minus a fraction $(1-d)$ of the output voltage. In steady state the average voltage across an inductor must be zero (otherwise its current would ramp away), so

That is the familiar boost relation, now written for the moving rectified input. Rearranged for the duty,

which is exactly the duty sweep we plotted above. This averaged relation (the switch replaced by its duty) is the average model, and it is the plant the controller in the next chapter is designed against.

Drawn as a circuit, the average model is the bridge and inductor as before, but with the switch-and-diode pair replaced by a single averaged switch that applies the fraction $(1-d)$ of the output voltage to the inductor side and passes the fraction $(1-d)$ of the inductor current to the output.

Figure 17 The average model of the boost PFC. The fast-switching pair (switch $Q$ and boost diode $D$) is collapsed into one averaged switch: it presents $\bar v_{sw}=(1-d)\,v_o$ to the inductor and delivers $\bar i_C=(1-d)\,i_L$ to the output. No switching events left to track: just the smooth, duty-controlled behaviour the controller is designed against.

Controlling the boost PFC

A boost converter is controlled with two nested feedback loops, an arrangement called cascade control. If you took the boost guide, that structure and the PI controllers inside it are already familiar, and a PFC controller is that same machinery with a couple of extra ideas layered on top. If you have not, nothing here assumes it: the next section builds cascade control from first principles, and every controller block gets opened up and explained in turn.

Why it must be cascade control

A plain boost, feeding a steady load, can be run with a single voltage-mode loop: measure the output, adjust the duty, done. A PFC cannot. It has two things to control at once (the DC output voltage and the shape of the input current) and you cannot regulate two quantities with one loop. So a PFC must use cascade control: an outer loop for the voltage wrapped around an inner loop for the current. There is no voltage-mode-only version of a PFC.

The two loops run on very different timescales:

• The output voltage must be held steady at $400\ \mathrm{V}$. This is slow: the DC bus is allowed to wobble gently across a grid cycle, and we only trim it over many cycles. It is the same outer voltage loop you already know from the cascade boost controller.
• The input current must be shaped into a sine that follows the grid, instant by instant. This is fast: the current has to track the moving reference faithfully within each switching period. It is the inner current loop, again just like the cascade boost.

The overall control structure

The cleanest way into PFC control is the block diagram. Here is the whole controller on one page; we will then open up each controller block in turn and see what is inside it.

Figure 18 The PFC controller. The slow outer voltage loop holds $V_{dc}$ and outputs only an amplitude, the peak current $I_{pk}$. That amplitude is multiplied by the normalized measured grid voltage $|v_g|/\hat V_g$ to build the current reference $i_{ref}(t)$. The inner current PI trims the error, while a feed-forward path computes the base duty $d_{ff}=1-|v_g|/V_{dc}$ directly from the measured grid voltage.

Read it left to right. The outer voltage loop sits on the far left and produces one number, the peak current $I_{pk}$. The multiplier turns that number into a shaped reference $i_{ref}(t)$ by multiplying it with the normalized grid voltage. The inner current loop then drives the inductor current onto that reference, and a feed-forward path supplies most of the duty directly. Two feedback wires run along the bottom: $i_L$ back to the inner loop, $V_{dc}$ back to the outer loop.

So far each controller is a single labelled box. The two boxes that do the real work (the voltage PI and the current PI) hide their internals. The next two sections open them up.

Inside the voltage controller

The outer voltage controller is the simpler of the two. Open the box and there is exactly one job: hold the DC bus at its target by setting the current amplitude. The diagram below is just the voltage loop's insides, lifted out of the overall structure.

Figure 19 Inside the voltage controller. The measured DC bus $V_{dc}$ is subtracted from the reference $V_{ref}$ to form the error $e_V=V_{ref}-V_{dc}$. A PI controller ($K_p+K_i/s$) acts on that error and outputs the peak-current amplitude $I_{pk}$ — a single number. That amplitude is then scaled by the normalised grid, $|v_g|/\hat V_g$, which is what turns it into the shaped current reference $i_{ref}$ the inner loop chases: a scalar goes into the multiplier, a rectified sine comes out. How that reference is built is taken apart later in this chapter.

Trace it through. The reference $V_{ref}$ (the $400\ \mathrm{V}$ target) meets the measured bus voltage $V_{dc}$ at the summing node; the node forms the error $e_V = V_{ref}-V_{dc}$. That error feeds a PI controller, and the PI's output is the peak current $I_{pk}$. That is the whole of the loop's regulating machinery: an error and a PI. If the load takes more power the bus sags, $e_V$ goes positive, and the PI raises $I_{pk}$ to refill it; if the bus runs high the PI backs $I_{pk}$ off. The integral term guarantees the bus settles exactly on $400\ \mathrm{V}$ with no standing error.

Notice what the box does not output: any shape or timing. $I_{pk}$ is a bare amplitude. The sinusoidal shape arrives at the multiplier that follows it, where the normalised grid is scaled by that amplitude, which is why the voltage controller can afford to be slow (more on that below).

Inside the current controller

The inner current controller is where the PFC's signature trick lives. Open the box and there are two paths feeding the duty, not one: a feedback PI and a feed-forward computed straight from the grid voltage.

Figure 20 Inside the current controller. The measured inductor current $i_L$ is subtracted from the reference $i_{ref}$ to form $e_I$. A PI acts on the error and outputs a small trim $\Delta d$. Crucially, the input-voltage feed-forward $d_{ff}=1-|v_g|/V_{dc}$ is computed directly from the measured grid voltage and added to the PI trim at the second summing node; their sum is the duty $d$ sent to the PWM.

Trace this one too. The shaped reference $i_{ref}$ meets the measured inductor current $i_L$ at the first summing node, forming the error $e_I = i_{ref}-i_L$. The PI acts on that error and outputs $\Delta d$, a small trim, not the whole duty. At the second summing node that trim is added to the feed-forward term $d_{ff}=1-|v_g|/V_{dc}$, which is computed directly from the measured grid voltage. Their sum is the duty $d$, which goes to the PWM and on to the switch.

The feed-forward path (the green branch into the second summing node) is the key idea of this chapter: instead of asking the PI to chase the fast-moving duty on its own, it is given a running start from the model. The next two sections build that duty and show exactly why the PI is still needed on top of it.

With both controllers opened up, we can now walk the parts of the structure in detail: how the current reference is built (the multiplier between the two loops), how the duty is built (the feed-forward plus the inner PI), and why the PI is there at all.

Building the current reference: amplitude times normalized voltage

In a plain boost, the outer voltage loop tells the inner current loop "hold the current at this steady level". In a PFC that is not enough: a steady current would be a flat line, not a sine. The fix is the standard, simple, industry method, and it is worth getting exactly right.

The outer voltage loop compares the DC bus to its $400\ \mathrm{V}$ target and outputs a single number: the peak current $I_{pk}$, the amplitude of the current we should draw. If the load takes more power, the bus sags, and the voltage loop raises $I_{pk}$ to refill it. It is just an amplitude; it carries no shape and no timing.

The shape and timing come from the grid itself. The boost stage sits behind the diode bridge, so what it actually sees is the rectified grid, $|v_g|$: never negative. We take that measured rectified voltage and normalize it (divide it by its peak $\hat V_g$) so it becomes a unit-height template that is exactly the shape of the rectified grid, in phase with it. Then the current reference is simply

Because the template is the measured rectified grid voltage, the current reference automatically follows it in shape and phase, the current tracks the voltage by construction, which is unity power factor. There is no separate sine oscillator to build or synchronize; you reuse a voltage you already measure. (And note: it is the same measured rectified grid voltage that the feed-forward below uses, so this measurement earns its keep twice.)

Building the duty: feed-forward does the hard work

Now the inner loop. Here is the single most important idea in PFC control, and it is the one a plain boost usually does without.

In a steady boost, the duty cycle barely moves, so a current PI on its own can hold it. In a PFC the operating point is a moving target: the rectified input $|v_g|$ sweeps from $0$ to $325\ \mathrm{V}$ and back a hundred times a second, so the duty must track it every instant. Asking a PI alone to chase that fast-moving target would leave a large tracking error and a distorted current.

So we do not ask it to. We feed the input voltage forward. From the average model in the last chapter we already know the duty that holds the bus steady for a given input:

We compute this directly from the measured (normalized) grid voltage and use it as the base duty. The feed-forward tracks the moving operating point; the current PI supplies only the small residual it misses. This feed-forward is crucial here in a way it is not for a steady boost, and it is what makes the current come out clean.

Why a PI on top of the feed-forward

If the feed-forward already computes the duty, why keep a feedback controller at all? Follow the chain and the answer falls out on its own.

The inner loop controls the inductor current. Across the inductor, $v_L = L\,di_L/dt$, and on average $v_L = |v_g| - (1-d)V_{dc}$. The feed-forward sets $d$ so that this average is nominally zero at the right current: that is the model. But the model is not the whole truth: we do not capture every dynamic, the inductance and the bus voltage are not known exactly, the measurements carry noise, and the load changes. So a proportional-integral (PI) controller sits on the current error $i_{ref} - i_L$ and trims the duty by whatever the feed-forward missed. Its integral term drives the steady-state current error to zero despite the plant uncertainty.

The outer voltage loop works the same way one level up. Its plant is the DC bus capacitor: the bus voltage rises when more charge goes in than the load takes out, and falls otherwise. A PI on the voltage error $V_{ref} - V_{dc}$ sets the amplitude $I_{pk}$ so that, on average, just enough current is drawn to hold the bus. Again the integral term removes the steady-state error that the imperfect model would otherwise leave.

So the division of labour is: the feed-forward handles the known, fast-moving behaviour from the model; the PI loops handle everything the model does not capture: uncertainty, noise, and load changes. A PI is enough here because the reference the inner loop must track is already shaped for it; the PI only has to null a slowly varying residual error.

The voltage loop must be slow

One more point, easy to miss and important. The outer voltage loop must be deliberately slow: its bandwidth well below the grid frequency.

Here is why. The voltage loop's output is the amplitude $I_{pk}$, and the current reference is $I_{pk}\,|v_g|/\hat V_g$. If $I_{pk}$ moved much within a single grid period, it would modulate the reference across the cycle and distort the otherwise-clean sinusoidal current, adding the very harmonics we are trying to remove. The single-phase bus also carries an unavoidable $100\ \mathrm{Hz}$ ripple; a fast voltage loop would try to "correct" that ripple and, in doing so, smear it into the current. So we tune the voltage loop intentionally slow: it should barely change $I_{pk}$ over one grid cycle, trimming the bus only across many cycles. Slow voltage loop, clean current: that is the trade, and it is deliberate.

How it behaves

Here is the controller settling from a cold start, both loops at work, for our running $1\ \mathrm{kW}$ example: the current amplitude settles at the $6\ \mathrm{A}$ peak that example needs, switching at $20\ \mathrm{kHz}$. These first plots are from the average model, the switch replaced by its duty, which is the right tool for seeing the loop behaviour.

Figure 21 Average model. Top: the slow voltage loop pulls the DC bus up to its $400\ \mathrm{V}$ target and then holds it, with the small $100\ \mathrm{Hz}$ ripple that every single-phase PFC bus carries. Middle: that loop outputs only the peak-current amplitude $I_{pk}$, which settles once the bus is up. Bottom: the inner current loop makes the inductor current $i_L$ follow the shaped reference $i_{ref}=I_{pk}\,|v_g|/\hat V_g$.

Retune the two loops yourself below. Speed the voltage loop up and you will see exactly the failure the last section warned about: $I_{pk}$ starts wobbling within the grid cycle and the current stops being a clean sine.

The average model is clean because it has hidden the switching. The exact (switching) model shows what the inductor current really looks like: the same shaped sine, but with high-frequency ripple riding on it as the switch chops on and off within each period.

Figure 22 Exact (switching) model, inductor current only. The current still traces the rectified-sine reference, but now you can see the switching ripple (the small sawtooth from the switch turning on and off each period) that the average model smooths away. Same shape, real ripple.

The totem-pole PFC

The boost PFC of the last two chapters is the right circuit to learn the ideas on: it made the mechanism plain to see. But it is not, in most modern chargers, the circuit that actually gets built. The totem-pole PFC is where the field has gone, and this chapter shows why: it is the same boost PFC you already understand, with the lossy diode bridge folded away.

Pros and cons, before the mechanism

Before we open the circuit, here is why anyone bothers, and what it costs.

Now the circuit.

Figure 23 The totem-pole PFC. There is no diode bridge. The grid connects through the inductor $L$ (in series with the grid) into two legs: a fast leg of two switches that switch at high frequency to shape the current, and a slow leg of two diodes that handle the polarity at the line frequency.

Read the topology off the figure. The boost inductor $L$ sits in series with the grid, the same energy-storing element doing the same job as before. One leg is the fast leg: two switches ($Q_1$, $Q_2$) chopping at high frequency to shape the current, the boost action. The other leg is the slow leg: two diodes ($D_a$, $D_b$) that simply steer the polarity, conducting for a whole half-cycle at a time at $50\ \mathrm{Hz}$. That is the whole device count: two switches, two diodes, one inductor.

Proving it is a boost PFC

The claim is that this is a boost PFC, just folded up. We will prove it the same way we read the passive bridge: cross out what is not conducting, then rearrange what is left into a shape you recognize. Two steps per half-cycle.

Positive half-cycle

When the grid voltage is positive, the current is forced down through the slow leg's conducting diode (it has no other path) while the other slow-leg diode is reverse-biased and irrelevant. Cross it out.

Figure 24 Positive half-cycle, step 1. The irrelevant slow-leg diode is crossed out; the current is forced through the conducting one (green). The fast leg keeps chopping.

Now rearrange. The conducting diode, while it is on, is just a wire: a short. Redraw the remaining circuit with that diode as a plain connection, and the inductor, the fast-leg switch and the output capacitor fall into the exact layout of a boost converter.

Figure 25 Positive half-cycle, step 2. With the conducting diode drawn as the wire it is, the inductor, the fast-leg switch and the capacitor rearrange into the recognizable boost layout. On the positive half, a totem-pole is exactly a boost.

Negative half-cycle

The negative half is the same idea, with the other slow-leg diode conducting. Cross out the now-irrelevant one and force the current through the conductor.

Figure 26 Negative half-cycle, step 1. The grid has reversed; now the other slow-leg diode conducts (green) and the first is crossed out.

Rearrange again, and this time reach for the reason it comes out the same, rather than just trusting that it does. The totem-pole's fast leg ($Q_1$ on top, $Q_2$ on bottom) and slow leg ($D_a$ on top, $D_b$ on bottom) are built as mirror images of each other about the horizontal midline. Reversing the grid polarity is exactly a top-bottom flip of that mirror: the diode that was irrelevant a moment ago ($D_a$) now conducts, the one that was conducting ($D_b$) is now irrelevant, and the two switches swap which one plays the boost switch and which one's body diode (the diode every MOSFET carries built in) plays the boost diode. Because the circuit itself is symmetric under that flip, retracing the same two steps, short the conducting slow-leg diode, then redraw, lands on the identical inductor-switch-diode-capacitor loop, with $Q_1$/$Q_2$ and $D_a$/$D_b$ simply having traded places.

Figure 27 Negative half-cycle, step 2. The same mirror argument, traced through: rearranged, it is again a boost converter, with $Q_1$/$Q_2$ and $D_a$/$D_b$ having swapped roles. From the boost's perspective the two half-cycles look identical.

So the totem-pole is a boost converter that swaps which devices play the boost role each half-cycle. The bridge's four diodes are gone, replaced by a slow leg of two diodes and a fast leg of two switches: fewer parts, and the current no longer pays a two-diode bridge toll on every pass: it now flows through a single slow-leg diode instead of two series bridge diodes. That is the efficiency win.

Figure 28 What it looks like built: the slow line-frequency leg, the toroidal boost inductor, the fast-switching leg and the bulk DC-link capacitor, laid out between the AC input and the 400 V DC output. Illustration, not a photograph of a specific product.

The controller difference

If the power circuit is a boost both halves, the control is the boost PFC control too: cascade loops, the current shaping $i_{ref}=I_{pk}\,|v_g|/\hat V_g$, the input-voltage feed-forward, all of it carries over unchanged. There is exactly one difference: a half-cycle-dependent modulation.

On the positive half, the fast leg behaves normally, with duty $d$. On the negative half, the polarity through the leg has flipped, so we drive the fast leg with $(1-d)$ instead of $d$. This is the fast-leg / slow-leg PWM idea: the slow leg defines which half-cycle we are in, and the fast leg uses $d$ or $1-d$ to match it. Everything else (the cascade structure, the current shaping, the feed-forward) is identical to the boost PFC.

Figure 29 The totem-pole fast-leg duty over one grid cycle: the normal boost-PFC duty $d$ on the positive half, switched to $(1-d)$ on the negative half. Aside from this half-cycle flip, the duty (and every other waveform) is identical to the boost PFC.

In a sentence

You now have the whole arc: why a bare diode bridge spikes the grid current and drags the power factor down, how a boost converter placed behind that bridge turns those spikes into a clean sine by sweeping its duty cycle across every instant of the grid cycle, how to control it with a cascade of a slow voltage loop and a fast current loop plus input-voltage feed-forward, and how the totem-pole folds the diode bridge into the boost itself for fewer parts and higher efficiency.

Play with the same running example in the companion passive-bridge and boost-PFC simulators: watch the spikes grow as the capacitor gets bigger, then switch to the active rectifier and watch those spikes pull back into a sine while the bus holds $400\ \mathrm{V}$ through every corner of the cycle.